In a series of components such as BOC components or else in CSP (Chip Size Package) components, FBGA (Fine Pitch Ball Grid Array), TBGA (Tape Ball Grid Array) or μBGA components or the like, the chips are mounted on substrates which are only slightly larger than the chips mounted on them. The various designations are to some extent indications typical of the manufacturer and identify differences or subtleties in the structural design.
For the case in which it is intended to achieve an overall height that is as small as possible, the chip rear-sides are not covered, but at most only the particularly sensitive chip edges are enclosed by a moulding compound. The latter may take place by dispensing a suitable moulding compound (casting compound) around the chip edges.
If, however, the chip rear-side is also to be additionally protected at the same time, it is necessary to use complex printing or casting methods.
It can easily be appreciated that the different materials for the substrate, the chip and the casting compound have in some instances considerably different coefficients of thermal expansion, which may lead to considerable stress when the components are in use. For the substrate, use is normally made of the customary printed circuit board materials, such as hard-paper or glass-fibre materials, in particular of a multilayer design, in which synthetic resin is usually used as a binder.
Examples of such semiconductor components are found in U.S. Pat. No. 5,391,916, which describes a semiconductor component sealed with a casting compound, or in U.S. Pat. No. 5,293,067, which describes a special chip carrier for a Chip on Board (COB) component in order to reduce the mechanical stress. Both of these patent applications are incorporated herein by reference.
By suitable material selection, the coefficients of expansion can be made to match one another in a certain way, such that the difference in the coefficients of expansion between the respective material pairing becomes as small as possible. Nevertheless, the multi-layered structural design of the substrate (generally a PCB/printed circuit board) causes considerable stress.
In particular in the case of BOC or COB components, this has the grave consequence that, if they are protected with an additional mould covering, they are subjected to extreme stress during normal use. This stress is essentially based on the “bimetal effect”, which results when different materials having different coefficients of expansion are joined together in layers.
In order to at least reduce the stress between the substrate and the chip, the chip is usually mounted on the substrate with a tape that compensates for thermal stresses interposed. In any event, there are then still significant differences in the respective coefficients of expansion between the silicon chip/moulding compound and moulding compound/substrate material pairings that are directly in contact with one another and in the PCB (substrate). In the worst-case situation, this may result in a separation of the connection or detachment of the micro-balls (μ balls), and consequently, possibly total failure of the component.
However, it has not been possible so far to overcome, or to overcome adequately, the effects of the thermomechanical stresses between the material pairings, and in particular in the substrate, with the result that stress-induced component failures must always be expected.